1. ÀÇ·Ú»ç: ±¹³» À¯¸í Á¾ÇÕ ÀÇ·á±â ȸ»ç
2. ¸ðÁý ³»¿ë : ÀÇ·á±â °ü·Ã ¾÷Á¾ FPGA ¼³°è Engineer °æ·Â 5~8³â ¸ðÁý
¢Ã Position
- ´ëÁ¹ÀÌ»ó (Àü±â/ÀüÀÚ °è¿ Àü°øÀÚ,ÀÇ¿ë°øÇÐ Àü°øÀÚ)
- ³²³à¹«°ü
- ÀüÀÚȸ·Î ¼³°è, FPGA ¼³°è
[ÀÚ°Ý¿ä°Ç]
- °æ·Â 5³â~8³â
- VHDL ¶Ç´Â verilog ¸¦ »ç¿ëÇÏ¿© Digital signal rocessing function FPGA ¹× beamfomring
- FPGA¼³°è´É·Â º¸À¯ÀÚ
-Xilinx virtex5, virtex4, Altera Stratix ±ÞÀÇ ´ë¿ë·® FPGA ¼³°è°æÇèÀÚ
- Xilinx ISE, Modelsim »ç¿ë °æÇèÀÚ
[Á÷¹«»çÇ×]
- Design requirement Spec ¹®¼ÀÛ¼º
- VHDLÀ» ÀÌ¿ëÇÑ FPGA ¼³°è
- FPGA ÀÛ¿ëÀ» À§ÇÑ digitalȸ·Î¼³°è
- FPGA verification¹× ½Å·Ú¼º °ËÁõ
- Beamforming ¾Ë°í¸®Áò ¹× ½Åȣó¸®¾Ë°í¸®Áò °³¹ß
¢Ã ¿¬ºÀ¼öÁØ ¹× º¹¸®ÈÄ»ý : ¿¬ºÀ ¹× Á÷±Þ ÃßÈÄ ÇùÀÇ °¡´É
¢Ã ±Ù¹«Áö : ¼¿ï
¢Ã Á¦Ãâ¼·ù: ±¹¹® À̷¼(»çÁøÇʼö) ¹× °æ·Â±â¼ú¼,Àڱ⠼Ұ³¼
¢Ã ÁøÇàÀýÂ÷ : 1Â÷ ¼·ù ÀüÇü- 2Â÷ ¸éÁ¢ÀüÇü
¢Ã ´ã´çÀÚ: ±è¿µÁÖ
¿¬¶ôó : 02-567-7407,7408
À̸ÞÀÏ : kyjoo@jhhr.co.kr
|